ȣ (Joongho Choi)

  

  

   ó


 

    Ư 빮 ø 163

    ǻͰк 130-743

   

    Tel : +82-2-6490-2328

    E-Mail : 

    

   

   

  


 

      1983 ~ 1987     б ڰ л

      1987 ~ 1989     б ڰ

      1989 ~ 1993     University of Southern California ڻ

      1994 ~ 1996     IBM T. J. Watson Research Center

      1996 ~ 2000     øб

      2000 ~ 2005     øб α

      2005 ~      øб

 

 

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Books

  , ӽ, ȣ, CMOS Ƴα ȸ , ȫǻ, ,

    2006.

 

  ̽, , ۹α, ȣ, CMOS Ƴα ȥ ý

    () (), ñ׸, , 1999.

 

  B. J. Sheu and Joongho Choi, Neural Information Processing and

    VLSI, Kluwer Academic Publisher, Boston, MA, 1995.

 

  Joongho Choi and B. J. Sheu, "Chapter 7: Neural Infromation

    Processing I", in Analog VLSI: Analog Signal and Information

    Processing, edited by M. Ismail and T. Fiez, McGraw-Hill Publisher,

    New York, NY, 1994.

 


 

International Journals

 

  Jungryoul Choi, Jungwoo Lee, Sangyun Han, Sungwook Kim,

    Soonwon Hong, and Joongho Choi, "A Readout Circuit with Novel Zero

    -g Offset Calibration for Tri-axes Capacitive MEMS Accelerometer",

     IEEE International Symposium on Circuits and Systems(ISCAS)

    , pp.1062-1065, May 2015 

 

  C. Park, K. Jang, S. Woo, H. Yu, J. Lee and J. Choi, "AC-DC converte

    using VGS-multiplier circuit for LED lighting applications",

     Electronics Letters, vol. 49, issue : 16, pp.984-985, Aug 2013

 

  K. Jang, S. Lee, J. Lee and J. Choi, "Offset-voltage compensation for

    accurate current-source circuit", Electronic Letters, vol. 48,

    issue : 15, pp.913-914, July 2012

 

  Zhi-Yuan Cui, Joong-Ho choi, Yeong-Seuk Kim, Shi-Ho Kim,  

    Nam-Soo Kim, "Application of a low-glitch current cell in 10-bit CMOS  

    current-steering DAC", Microelectronics International , Vol. 26 Iss: 3,  

    pp.35 - 40 ,  2009 .

 

  Hee-Cheol Choi, Gil-Cho Ahn, Joong-Ho choi, and Seung-Hoon Lee,

    "A Rail-to-Rail Input 12b 2Ms/s 0.18um CMOS Cyclic ADC for

    Touch Screen Applications", Journal of Semiconductor Technology

    and Science, vol. 9, no. 3, pp. 160-165, Sept. 2009.

 

  H. K. Yang, S. H. Cha, S. Y. Lee, S. H. Lee, J. U. Lim, and

    Joongho Choi, "A 1.2-V wide-band SC filter for wireless

    communication transceivers", IEEK Journal of Semiconductor

    Technology and Science, vol. 6, no. 4, pp. 286-293, Dec. 2006.

  J. U. Lim, and Joongho Choi, "A low-power sigma-delta modulator

    for wireless communication receivers using adaptive biasing circuitry

    and cascaded comparator scheme", Jour. Analog Integrated Circuits

    and Signal Processing, vol. 49, no. 3, pp. 359-365, Springer, Dec. 2006.

 

  J. U. Lim, Y. J. Cho, and Joongho Choi, "A 9-bit ADC with a Wide-

    Range Sample-and-Hold Amplifier," IEEK Journal of Semiconductor

    Technology and Science, vol. 4, no. 4, pp. 280-285, Dec. 2004.

  J. U. Lim, S. W. Noh, K. O. Kim, and Joongho Choi, "A  3.3-V ISDN

    U-interface line driver with a new IQ-control circuit," IEEE Jour. Solid-

    State Circuits, vol. 38, no. 8, pp. 1421-1424, Aug. 2003.

 

  Joongho Choi, and J. R. Choi, "A  low-power 100MHz analog FIR filter

    for PRML equalization," Jour. Analog Integrated Circuits and Signal

    Processing, vol. 28, no. 3, pp. 225-238, Kluwer Academic Publisher,

    Boston, MA, Sep. 2001.

 

  K. H. Kim, H. J. Chung, S. H. Yoon, S. W. Hwang, J. Park, S. W. Kim,

    Joongho Choi, and D. Ahn, "Full software analysis and impedance

    matching of radio frequency CMOS integrated circuits," IEEE Trans.

    Components and Packaging Technologies, vol. 23, no. 1, pp. 183-189,

    Mar. 2000.

 

  J. Yang, Joongho Choi, D. M. Kuchta, K. G. Stawiasz, P.

    Pepeljugoski, and H. A. Ainspan, "A 3.3-V, 500-Mb/s/ch parallel optical

    receiver in 1.2-um GaAs technology," IEEE Jour. Solid-State Circuits,

    vol. 33, no. 12, pp. 2197-2204, Dec. 1998.

 

  R. C. Chang, B. J. Sheu, Joongho Choi, and D. C.-H. Chen,

    "Programmable-weight building blocks for analog VLSI neural network

    processors," Jour. Analog Integrated Circuits and Signal Processing,

    vol. 9, no. 3, pp. 215-230, Kluwer Academic Publisher, Boston, MA, Apr.

    1996.

 

  S. H. Bang, Joongho Choi, and B. J. Sheu, "A compact low-power

    VLSI transceiver for wireless communication," IEEE Trans. Circuits and

    Systems I, vol. 42, no. 11, pp. 933-945, Nov. 1995.

 

  Joongho Choi, B. J. Sheu, and B. W. Lee, "A 16-bit sigma-delta A/D

    converter with high-performance operational amplifiers," Jour. Analog

    Integrated Circuits and Signal Processing, vol. 6, no. 2, pp. 105-119,

    Kluwer Academic Publisher, Boston, MA, Sep. 1994.

 

  Joongho Choi, B. J. Sheu, and O. T.-C. Chen, "A Monolithic GaAs

    receiver for optical interconnection systems," IEEE Jour. Solid-State

    Circuits, vol. 29, no. 3, pp. 328-331, Mar. 1994.

 

  Joongho Choi, B. J. Sheu, and J. C.-F. Chang, "A Gaussian synapse

    circuit for analog VLSI neural networks," IEEE Trans. Very Large Scale

    Integration (VLSI) Systems, vol. 2, no. 1, pp. 129-133, Mar. 1994.

 

  Joongho Choi, S. H. Bang, and B. J. Sheu, "A programmable analog

    VLSI neural network processor for communication receivers," IEEE

    Trans. Neural Networks, vol. 4, no. 3, pp. 484-495, May 1993.

 

  Joongho Choi and B. J. Sheu, "A high-precision VLSI winner-take-all

    circuit for self-organizing neural networks," IEEE Jour. Solid-State

    Circuits, vol. 28, no. 5, pp. 576-584, May 1993.

 

  S. M. Gowda, B. J. Sheu, Joongho Choi, C. G. Hwang, and J. S.

    Cable, "Design and characterization of analog VLSI neural network

    modules," IEEE Jour. Solid-State Circuits, vol. 28, no. 3, pp. 301-313,

    Mar. 1993.

 

  J.-C. Lee, B. J. Sheu, Joongho Choi, and R. Chellapa, "A mixed-

    signal VLSI neuroprocessor for image restoration," IEEE

    Trans. Circuits and Systems for Video Technology, vol. 2, no. 3, pp.

    319-324, Sep. 1992.

 

  W.-C. Fang, B. J. Sheu, O. T.-C. Chen, and Joongho Choi, "A

    VLSI neural processor for image data compression using self-

    organizing networks," IEEE Trans. Neural Networks, vol. 3, no. 3,

    pp. 506-518, May 1992.

 

 


 

International Patents

 

  Joongho Choi, B. Y. Park, and J. H. Ahn, "Delay time compensation

    circuit for clock buffer," U. S. Patent, no.6198326B1, Mar. 2001.

 

 


 

Domestic Patents

 

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   " ġ ġ "  no.10-2011-0087847, Aug. 2011.

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   "߱ ̿ ġ "  no.10-2011-0077687, Aug. 2011.

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   " ߱ ̿ ġ"

   no.10-2011-0058285, Jun. 2011.

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   "ġ"  no.10-2011-0057378,  Jun. 2011.

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    no.10-2011-0003824, Jan. 2011.

ȣ, ھ,"Programmable Gain Amplifier ġ"

   0002053ȣ,  Dec. 2010.

 

 


 

Domestic Journals

 

  â, , Ȳ, ȣ, "Digital PFC Controller Algorithmic

    ADC ", ѱȸ, ȸ, v.16 no.4,

    pp.343-348, 2012 12

 

  ö, â, 켱, ȣ, "͸ 뷮  ػ Integrating

    Sigma-Delta ADC ", ѱȸ, ȸ,

    v.16 no.1, pp.28-33, 2012 3

 

  , â, ȣ, "ȿ ļ LDO ַ"

    ڰȸ, ڰȸ-SD, 48 SD 11ȣ, pp.34-40,

    2011 11

 

  , ȣ, " DC-DC ȯ

    ȸο ", ڰȸ, ڰȸ, 37 8ȣ

    pp. 86~94, 2010 8.

 

  , ȣ, "UMTS ű⸦ CMOS -ð
    ñ׸-Ÿ ⷹ",
ڰȸ , 44, SD, 8ȣ,

    pp. 65-73, 2007 8.

 

   Jinup Lim, and Joongho Choi, "A low power baseband analog front-

     end for versatile wireless transceivers", TELECOMMUNICATIONS

      REVIEW, 17, 3ȣ, pp. 379-395, 2007 6..

 

  , , , , ȣ, " Feedback 
     ȿ CMOS DC-DC Boost ȯ ",
ڰȸ

    , 43, SD, 9ȣ, pp. 23-30, 2006 9.

  ȣ, "Fractional-N ļ ռ⸦ ñ׸-Ÿ

    ", øб  , pp. 40-44, 2004 12.

 

  , , , , ȣ, " ȣ  250-

     Mbps 10-ä CMOS ű ", ڰȸ ,

    37, SC, 6ȣ, pp. 25-34, 2000 11.

 

  ȣ, "𵩿 Ƴα Ʈ- ",

    øб  , pp. 108-116, 1999 6.

 

  , , ȣ, " ܼ 4-Mbps

     ű Ĩ ", ڰȸ , 36, C, 2ȣ,

    pp. 54-61, 1999 2.

 

  ȣ, " ȣ ű ", ڰȸ CAD

    VLSI ȸ, 6, 1ȣ, pp. 71-87, 1997 12.

 

  ȣ, "- -ð Ƴα ȸ ",

    øб , 4, pp. 137-144, 1996 12.

 


 

International Conference Papers

 

  Kichang Jang, Jungsoo Choi, Chulkyu Park, and Joongho Choi,

    "A Voltage-Mode DC-DC Converter with Enhanced Transient

   Responses", IEEE International Symposium on Circuits and Systems

   (ISCAS), pp.974-977, May 2012

 

  Sanghyun Cha, Deukhee Park, Yuenjoong Lee, Changseok Lee,

    Joongho Choi, "AC/DC Converter Free LED Driver for Lightings",

    IEEE 2012 International Conference on Consumer Electronics(ICCE),

    pp. 706-708 Jan 2012  

 

  Ji-Su Kim, Joongho Choi, Jae-Hyun Kim, "MPEG-4 codec based uplink

    resource allocation scheme for the video telephony service in

    WiBro/WiMAX systems", IEEE 2011 International Symposium on Circuits

    and Systems, May 2011 pp. 2753-2756

 

  Yong-Seo Koo, Kwang-Yeob Lee, Joong-Ho Choi, Chan-Ho Lee,

    Yoon-Sik Lee, Yil-Suk Yang, "Electrical Characteristics of novel ESD

    Protection Devices for I/O and Power Clamp", Proc. IEEE 2011

    International Symposium on Circuits and Systems. pp. 937-940, Rio

    de Janeiro, Brazil, May. 2011.

 

  Seok Lee, Jayang Yoon, Jaehoon Kim, Changsuk Lee, Jaeshin Lee

    and Joongho Choi, "High-Capacity DC-DC Converters for Active Matrix

   OLED Display", Proc. IEEE 2010 Asia Pacific Conference on Circuits

   and Systems. pp.480-483 ,Kuala Lumpur, Malaysia, December, 201

 

  Jayang Yoon, Jinseok Koh, Seok Lee, Jaehoon Kim, Namjin Song

    and Joongho Choi, "Low-Noise Amplifier Path for Ultrasound System

   Applications", Proc. IEEE 2010 Asia Pacific Conference on Circuits

   and Systems. pp.244-247 ,Kuala Lumpur, Malaysia, December, 2010

 

  Seunghyun Jang, Junsang Lee, Joongho Choi, Kwang-chun Lee,

   "Low Power Analog Front-End Circuits in 130-nm CMOS for Multi-

   Standard Zero-IF Receivers"    Proc. EuMW 2010 The European

   Microwave Integrated Circuits Conference, pp. 373-376, Paris, France,  

   September, 2010

 

  Jinmo Jang, Joongho Choi, "13-BITS 50-KSAMPLES/S ALGORITHMIC

   ADC" Proc. Int. Technical Conference on Circuits/Systems,

   Computers and Communications (ITC-CSCC), pp. 779-782, Pattaya,

   Thailand, June, 2010

 

  Jinmo Jang, Joongho Choi, "5.8GHZ RF TRANSCEIVER PRODUCT

    TEST" Proc. Int. Technical Conference on Circuits/Systems, Computers

    and Communications (ITC-CSCC), pp. 779-782, Pattaya, Thailand,

    June, 2010

 

Jungsu Choi, Kichang Jang, Junsang Lee, Wooju Jeong, Jungeui Park,

    Jayang Yoon, Seok Lee and Joongho Choi, "Design of Wide- 

    Bandwidth Sigma-Delta Modulator for Wireless Transceivers",

    Proc. ISIC 2009  International Symposium on Integrated Circuits.  

     pp. 598-601, Singapore, Dec. 2009.

 

Jungsoo Choi, Jungeui Park,  Wooju Jeong, Junsang Lee, Seok Lee,

    Jayang Yoon, Jaehoon Kim and Joongho Choi, "Design of LDO

   Linear Regulator with Ultra Low-Output Impedance Buffer",

    Proc. IEEK 2009 International SoC Design Conference.  pp. 420-423,     

    Busan, Korea, Nov. 2009.

 

Jungeui Park, Jungsoo Choi, Wooju Jeong, Sangduk Yu, Kichang Jang,

   Youngchan Choi, and Joongho Choi, "Current-Sensing Technique

   for Current-Mode DC-DC Buck Converter with Offset-Voltage

   Compensation", Proc. IEEE 2008 AP Conference on Circuits and

    Systems, pp. 1704-1707,  Macao, China, Dec. 2008.

 

Youngchan Choi, Sangduk Yu, Kichang Jang, Jungsoo Choi,

   Jungeui Park, Wooju Jeong, and Joongho Choi, "An Active-RC Filter

   with Variable Bandwidth and Channel-Selectivity Characteristics", 

    Proc. IEEK 2008 International SoC Design Conference, pp. 13-16,

    Busan, Korea, Nov. 2008.

 

Kichang Jang, Seungyun Lee, Sangheon Lee, Jinup Lim, Sanghyun Cha,

   Huikwan Yang, Joongho Choi, "A Low Power 13-Bit Analog Front End

   for Mobile Battery Monitoring Applications ", Proc. IASTED 2008

   Conference, pp. 89-92, Kailua-Kona, Hawaii, USA, August. 2008.

 

  Sangduk Yu, Kichang Jang, Sanghyun Cha, Yeonjung Lee, Ohjo Kwon,
    Kyougsoo Kwon, and Joongho Choi
, " A Piezoelectric Actuator Driver

    Circuit for Automatic Focusing of Mobile Phone Cameras", Proc. IEEE

    Inter. Symp. Circuits and Systems, pp. 2106-2109, Seattle, Washington,

    USA, May. 2008.

 

  Jinup Lim, Sanghyun Cha, Huikwan Yang, Seungyun Lee, Sangheon

    Lee and Joongho Choi, " A Low-Voltage Active-RC Filter for Wideband

    Communication Transceivers", Proc. ISCIT 2007 Conference,

     pp. 260-263, Sydney, Australia, Oct. 2007.

  Seungyun Lee, Sangheon Lee, Sangduk Yu, Kichang Jang, Youngchan

    Choi, Jinup Lim, and Joongho Choi, "Design of a Low-Power ADC

    Array for Multiple Sensor Applications", Proc. IEEK 2007 International

    SoC Design Conference, pp. 481-484, Seoul, Korea, Oct. 2007.

  H. K. Yang, S. H. Cha, S. Y. Lee, S. H. Lee, J. U. Lim, and

   Joongho Choi, "A 1.2V wide-band SC filter for wireless

   communication receivers", Proc. IEEE TENCON 2006, pp. undefined,

   Hong Kong, China, Nov. 2006.

  S. H. Cha, H. K. Yang, S. Y. Lee, S. H. Lee, J. U. Lim, and

    Joongho Choi, "A 1.2V wide-band active-RC filter for wireless

    communication receivers", Proc. IEEE TENCON 2006, pp. undefined,

    Hong Kong, China, Nov. 2006.

  Huikwan Yang, Sanghyun Cha, Jinup Lim, Soonwon Hong, Donghoon

    Lee and Joongho Choi, "Design of a wide-band two-path S modulator

     for sensor applications", Proc. IEEK 2006 International SoC Design

     Conference, pp. 439-442, Seoul, Korea, Oct. 2006.

  H. K. Yang, S. H. Cha, S. Y. Lee, S. H. Lee, J. U. Lim, and

    Joongho Choi, "A low-voltage wide-band SC filter for wireless

    communication receivers", Proc. IEEK 2006 International SoC Design

    Conference, pp. 3-6, Seoul, Korea, Oct. 2006.

  Joongho Choi, J. U. Lim, and C. C. Lim "A low-voltage 

    operational amplifier with high slew-rate for sigma-delta modualtors",

    Proc. IEEE Inter. Symp. Circuits and Systems, pp. 903-906, Kos,

    Greece, May 2006.

  J. U. Lim, Y. J. Cho, K. S. Jung, J. M. Park, H. K. Yang, S. H. Cha, and

    Joongho Choi, "An Active-RC Filter with a Fast On- Chip Tuning

    Circuit", Proc. IEEK 2005 International SoC Design Conference, pp.

    572-573, Seoul, Korea, Oct. 2005.

  J. U. Lim, Y. J. Cho, K. S. Jung, J. M. Park, Joongho Choi, and

    J. H. Kim, "A Wide-Band  Active-RC Filter with a Fast Tuning Scheme

    for a Wireless Communication Receivers", Proc. IEEE  Custom

    Integrated  Circuits Conference, pp. 22.3.1-22.3.4, San Jose, CA, Sep.

    2005.

  K. S. Jung, J. U. Lim, J. M. Park, H. K. Yang, S. H. Cha, and

    Joongho Choi, "A High Efficiency CMOS DC-DC Boost Converter 

    with Current Sensing Feedback", Proc. IEEE 48th Midwest Symp. 

    Circuits and Systems, pp. 1661-1664, Cincinnati, OH, Aug. 2005. 

  Y. J. Cho, J. U. Lim, K. S. Jung, J. M. Park, H. K. Yang, S. H. Cha, and

    Joongho Choi, "Fast On-Chip Tuning Circuit for Active-RC Filters

    using the SAR Scheme", Proc. IEEE 48th Midwest Symp. Circuits and

    Systems, pp. 1522-1525, Cincinnati, OH, Aug. 2005. 

 

  J. U. Lim, Y. J. Cho, and Joongho Choi, "A 9-bit ADC with a Wide-

    Range Sample-and-Hold Amplifier," Proc. IEEK 2004 International SoC

    Design Conference, pp. 237-240, Seoul, Korea, Oct. 2004.

  S. H. Lim, J. U. Lim, Y. J. Cho, J. J. Lee, K. S. Jung, J. M. Park, and

    Joongho Choi, "A Channel-Selection Switched Capacitor Filter with

    Slew-Rate Enhancement Operational Amplifiers," Proc. IEEE 47th

    Midwest Symp. Circuits and Systems, pp. I-117-I-120, Hiroshima, Japan,

    July 2004.

  J. J. Lee, J. M. Park, J. U. Lim, K. S. Jung, S. H. Lim, Y. J. Cho, S. M.

    Park, and Joongho Choi, "A 1.25-Gb/s CMOS Burst-Mode Optical

    Receiver with Automatic Level Restoration for PON Applications," Proc.

    IEEE 47th Midwest Symp. Circuits and Systems, pp. I-137-I-140,

    Hiroshima, Japan, July 2004.

 

  C. S. Kim, S. H. Lim, J. U. Lim, and Joongho Choi, "Design

    considerations of the Sigma-Delta modulator for fractional-N frequency

    synthesizer," Proc. Int. Technical Conf. Circuits/Systems, Computers

    and Communications (ITC-CSCC), pp. 869-872, Kangwon-Do, Korea,

    July, 2003.

 

  J. Y. Shin, S. K. Min, S. S. Kim, Joongho Choi, S. H. Lee, H. J. Park,

    and J. H. Kim, "3.3-V baseband Gm-C filters for wireless transceiver

    applications," Proc. IEEE  Inter. Symp. Circuits and Systems, pp.

    I-457-I-460, Bangkok, Thailand, May. 2003.

 

  Joongho Choi, S. K. Min, and C. S. Kim, "A 100MHz 7th-order gm-C

    filter with a wide-range transconductance amplifier," Proc. IEEE 45th

    Midwest Symp. Circuits and Systems, pp. III-137-III-140, Tulsa, OK,

    Aug. 2002.

 

  S. K. Min, S. S. Kim, O. J. Kwon, C. S. Kim, and Joongho Choi,

    "A study on programming for high-frequency CMOS continuous-time

    filter," Proc. 2002 ICEIC, pp. 379-382, Ulaanbaatar, Mongolia, July 2002.

 

  J. Y. Shin, Joongho Choi, J. U. Lim, S. W. Noh, N. I. Baek, and J. H.

    Lee, "A 3.3-V analog front-end chip for HomePNA applications," Proc.

    IEEE  Inter. Symp. Circuits and Systems, pp. IV698-IV701, Sydney,

    Australia, May. 2001.

 

  Joongho Choi, J. U. Lim, S. W. Noh, J. Y. Shin, and K. O. Kim, "3.3-V

    line drivers for digital subscriber line applications," Proc. IEEE  Inter.

    Symp. Circuits and Systems, pp. I711-I714, Sydney, Australia, May.

    2001.

 

  J. R. Choi and Joongho Choi, "Design considerations of sampled

    analog equalizer for hard-disk read channel," Proc. IEEE TENCON 99,

    pp. 1347-1350, Cheju, Korea, Sep. 1999.

 

  K. O. Kim, J. R. Choi, and Joongho Choi, "Design of 250Mb/s 10-

    channel CMOS optical receiver array for computer communication,"

    Proc. The 1st IEEE Asia Pacific Conf. on ASICs, pp. 29-32, Seoul,

    Korea, Aug. 1999.

 

  J. R. Choi, K. O. Kim, S. W. Noh, J. U. Lim, and Joongho Choi, "A low  

    power 100MHz analog FIR filter for hard disk read channel," Proc. Int.

    Technical Conf. Circuits/Systems, Computers and  Communications

    (ITC-CSCC), pp. 293-296, Niigata, Japan, July, 1999.

 

  J. Yang, Joongho Choi, D. Kuchta, K. Stawiasz, P. Pepelijugoski, and

    H. Ainspan, "A 3.3V 20-channel 500Mbp/s/ch optical receiver with

    integrated optical detectors in a 1.2-m GaAs technology," Tech. Dig.

    IEEE International Solid-State Circuits Conference, pp. 206-207, San

    Francisco, CA, Feb. 1998.

 

  P. Xiao, D. Kuchta, K. Stawiasz, H. Ainspan, Joongho Choi, and H.  

    Shin, "A 500Mb/s 20-channel CMOS laser diode array driver for a

    parallel optical bus," Tech. Dig. IEEE International Solid-State Circuits

    Conference, pp. 250-251, San Francisco, CA, Feb. 1997.

 

  J. Crow, Joongho Choi, M. Cohen, G. Johnson, D. Kuchta, D. Lacey,

    S. Ponnapalli, P. Pepeljugoski, K. Stawiasz, J. Trewhella, P. Xiao, S.

    Tremblay, S. Ouimet, A. Lacerte, M. Gauvin, D. Booth, W. Nation, T.

    Smith, B. DeBaun, G. Henson, S. Igl, N. Lee, A. Piekarczyk, A.

    Kuczma, and S. Spanoudis, "The jitney parallel optical interconnect,"

    Proc. IEEE Electronics Components Technology Conf., pp. 293-300,

    Orlando, FL, 1996.

 

  Y. M. Wong, D. J. Muehlner, C. C. Faudskar, M. Fishteyn, J. V. Gates,

    P. J. Anthony, G. J. Cyr, Joongh Choi, J. D. Crow, D. M. Kuchta,

    P. K. Pepelijugoski, K. Stawiasz, W. Nation, D. Engebretsen, B.

    Whitlock, R. A. Morgan, M. K. Hibbs-Brenner, J. Lehman, R. Walterson,

    E. Kalweit, and T. Marta, "Optoelectronic Technology Consortium

    (OETC) parallel optical data link: Components, system applications,

    and simulation tools," Proc. IEEE Electronics Components

    Technology Conf., pp. 269-278, Orlando, FL, 1996.

 

  Joongho Choi, D. L. Rogers, D. M. Kuchta, Y. H. Kwark, H. A.

    Ainspan, K. G. Stawiasz, and J. D. Crow, "High-performance, high-

    yield, uniform 32-channel optical receiver array," Tech. Dig. IEEE/OSA

    Optical Fiber Communication Conference, pp. 309-310, San Jose, CA,

    Feb. 1996.

 

  Joongho Choi, B. J. Sheu, and J. C.-F. Chang, "Programmable

    synapse and neuron circuits in VLSI for perceptrons and cellular neural

    networks," Proc. INNS World Congress on Neural Networks, pp. 570-575,

    San Diego, CA, June 1994.

 

  Joongho Choi, B. J. Sheu, and J. C.-F.Chang, "A Gaussian synapse

    circuit for analog VLSI neural networks," Proc. IEEE International

    Symposium on Circuits and Systems, pp. 483-486, London, England,

    May 1994.

 

  S. H. Bang, B. J. Sheu, and Joongho Choi, "Programmable VLSI

    neural network processors for equalization of digital communication

    channels," Proc. IEEE International Workshop on Applications of Neural

    Networks to Telecommunications, pp. 1-12, Princeton, NJ, Oct. 1993.

 

  S. H. Bang, Joongho Choi, and B. J. Sheu, "A 3V data transceiver chip

    for dual-mode cellular communications," Tech. Dig. IEEE Symposium

    on VLSI Circuits, pp. 71-72, Kyoto, Japan, May 1993.

 

  Joongho Choi and B. J. Sheu, "An integrated GaAs receiver for

    optoelectronic signal processing and interconnection," Proc. IEEE

    Custom Integrated Circuits Conference, pp. 29.2.1-29.2.3, San Diego,

    CA, May 1993.

 

  Joongho Choi, S. H. Bang, and B. J. Sheu, "A programmable VLSI     neural network processor for digital communications," Proc. IEEE

    Custom Integrated Circuits Conference, pp. 16.5.1-16.5.4, San

    Diego, CA, May 1993.

 

  B. J. Sheu and Joongho Choi, "VLSI neural network processors and

    effective learning," the invited tutorial in IEEE International Symposium

    on Circuits and Systems, Chicago, IL, May 1993.

 

  Joongho Choi, B. J. Sheu, and B. W. Lee, "A 16-bit sigma-delta A/D  

    converter with high-performance operational amplifiers," Proc. 1992

    International Electron Devices and Materials Symposium, pp. 267-270,

    Taipei, Taiwan, Nov. 1992.

 

  Joongho Choi and B. J. Sheu, "A GaAs receiver for optoelectronic

    signal processing and interconnection," Proc. 1992 International

    Electron  Devices and Materials Symposium, pp. 233-236, Taipei,

    Taiwan, Nov. 1992.

 

  Joongho Choi and B. J. Sheu, "VLSI design of compact and high-

    precision analog neural network processors," Proc. IEEE International

    Conference on Neural Networks, vol. II, pp. 637-641, Baltimore, MD,

    June 1992.

 

  S. M. Gowda, B. J. Sheu, and Joongho Choi, "Testing of

    programmable analog neural network processors," Proc. IEEE Custom

    Integrated Circuits Conference, pp. 17.1.1-17.1.4, Boston, MA, May

    1992.

 

  B. J. Sheu, Joongho Choi, and C.-F. Chang, "An analog neural

    network processor for self-organizing mapping," Tech. Dig. IEEE

    International Solid-State Circuits Conference, pp. 136-137, San

    Francisco, CA, Feb. 1992.

 

  Joongho Choi and B. J. Sheu, "A GaAs receiver module for

    optoelectronic computing and interconnection," Proc. IEEE International

    Conference on Computer Design, pp. 494-497, Cambridge, MA, Oct.

    1991.

 

  Joongho Choi, B. J. Sheu, and S. M. gowda, "Analog VLSI neural

    network implementation of hardware annealing and winner-take-all

    functions," Proc. IEEE 34th Midwest Symposium on Circuits and

    Systems, pp. 344-347, Monterey, CA, May 1991.

 

  C.-F. Chang, B. J. Sheu, W.-C. Fang, and Joongho Choi, "A trainable

    analog neural chip for image compression," Proc. IEEE Custom

    Integrated Circuits Conference, pp. 16.1.1-16.1.4, San Diego, CA, May

    1991.

 


 

Domestic Conference Papers

 , â, ö, ȣ, " п ϴ νƮ ȯ⸦

    Soft Start-up ȸο ", ڰȸ, 2015 SoC мȸ,

    , ѱ, 2015 5

 

  Ȳ, â, ö, ȣ, " LLC IC

    50% Ƽ ȸ ", ڰȸ, 2014 SoC мȸ, ,

    ѱ, 2014 5

 

  ȿ, , â, ö, ȣ, "AC-ȣ 2

    Capacitor-Coupling ȸ ", ڰȸ, 2014 SoC мȸ,

    , ѱ, 2014 5

 

 Seungheun Song, Kichang Jang, Chulkyu Park, Joongho Choi, "A 14-b

    Ratio-Independent Algorithmic ADC", 21ȸ ѱ ݵü мȸ, ,

    ѱ, 2014 2

 

, â, ö, ȣ, " LLC Ʈѷ IC

   ", ڰȸ, 2013 SoC мȸ, 뱸, ѱ, 2013 5

 

ȣ, â, , öȣ, , ȣ, " Ȯ

    ֵ LED IC ", ڰȸ, 2013 SoC мȸ, 뱸, ѱ,

    2013 5

 

Sunsik Woo, Chulkyu Park, Kichang Jang, Jungryul Choi, Joongho Choi,

    "Design of Low-Power Sigma-Delta Modulator with Operational Amplifier

    Switching", 20ȸ ѱ ݵü мȸ, Ⱦ, ѱ, 2013 2

 

ֽ, â, ö, , ȣ, "Ƽ̵ 뷮 Current Mode

    DC-DC Buck ȯ ", ڰȸ, 2012 SoC мȸ, ,

    ѱ, 2012 4

 

, ȣ, " Mutual Capacitive Touch Sensor for Mobile Application"

   18ȸ ѱ ݵü мȸ, Session CDC5, , ѱ, 2011 2. 

 

J. M. Jang and J. H. Choi, " 13-Bits Algorithmic ADC", 18ȸ ѱ

  ݵü мȸ, Session CDC27, , ѱ, 2011 2. 

 

ػ, ̼, ھ, , , ȣ,  " Tuning ȸθ

   ļ Active-RC ",ڰȸ, 2010 SoC

  мȸ, õ, ѱ, 2010 5.

 

, â, , , ػ, ȣ,  " ۼű

   뿪 ñ׸-Ÿ ", 17ȸ ѱ ݵü мȸ,

    Session CDC9, , ѱ, 2010 2. 

 

, , , ػ, ̼, ھ, õ, ö, ȣ,

   " LED ϱ ȿ DC-DC ȯ 迡

    ",ڰȸ, 2009 SoC мȸ, Session C1.4,

   , ѱ, 2009 5.

 

, ֿ, â, , , , ȣ, "

     ȯ 迡 ", ڰȸ,

    2008 SoC мȸ, pp.17-20, , ѱ, 2008 5.

 

, ̽, ̻, , ֿ, â, ȣ, " 뿪 

    -ð ñ׸-Ÿ ⷹ 迡 ", ڰȸ   

    2007 SoC мȸ, pp. S13.2, , ѱ, 2007 5.

, , , ̽, ̻,ȣ, "A low-power continuous-

   time S modulator with 74dB dynamic range for wireless communication

   applications", 14ȸ ѱ ݵü мȸ , pp. 747-748, ,

   ѱ, 2007 2.

, , , ̽, ̻, , ȣ, "

   Feedback  ȿ CMOS DC-DC Boost ȯ ",

   2006 SoC мȸ , pp. 241-244, , ѱ, 2006 5.

, , ̽, ̻, , ȣ, "A wide-band low voltage

   Active-RC filter for wireless communication systems", 2006 SoC

   мȸ , pp. 402-405, , ѱ, 2006 5.

  , , , , , ̽, ȣ, "A 1.25Gbps

    CMOS burst-mode optical receiver with wide dynamic range for PON

    applications", 13ȸ ѱ ݵü мȸ , pp. 963-964, ,

    ѱ, 2006 2.

  ӻ, , , , , , ȣ, "A Dual-Band

    Channel-Selection Switched-Capacitor Filter with Slew-Rate

    Enhancement Operational Amplifiers", 12ȸ ѱ ݵü мȸ

    , pp. 101-102, , ѱ, 2005 2.

  ǿ, , ȣ, , , , "5GHz CMOS voltage-

    controlled oscillator ", ڰȸ 2003 SOC Design

    Conference, pp. 921-924, , ѱ, 2003 11.

  Ƚ, ǿ, , ȣ, " ȣ ̽ CMOS

    ADC ", 2003 ڰȸ ϰмȸ , pp. 975-

    978, , ѱ, 2003 7.

 

  , , ȣ, "Multi-bit Sigma-Delta modulator Data     Weighted Averaging ȿ ", 2003 CAD VLSI

    ȸ мǥȸ , pp. 164-169, , ѱ, 2003 5.

 

  , , , μ, ȣ, "JFET gate bias CMOS     negative voltage generator", 9ȸ ѱ ݵü мȸ , pp.     

    731-732, õ, ѱ, 2002 2.

 

  , μ, , , ȣ, "Floating-control ̿

    Gm-C bandpass filter ", 9ȸ ѱ ݵü мȸ , pp.

    435-436, õ, ѱ, 2002 2.

 

  , , μ, , ȣ, "Design of the oversampling

    sigma-delta modulator for DSL applications", 9ȸ ѱ ݵü мȸ

    , pp. 153-154, õ, ѱ, 2002 2.

 

  , μ, , , ȣ, "DSL 9 CMOS

    Gm-C Bandpass ", 2001 SOC Design Conference ,

    pp.388-395, , ѱ, 2001 11.

 

  , , , , ȣ, "An analog front-end chip for     HomePNA physical layer", IDEC Conf. 2001 Spring , pp. 194-195,     , ѱ, 2001 2.

 

  , ȣ, "Capacitance-disturbed dithering 4

    bandpass SD modulator ", 7ȸ ѱ ݵü мȸ , pp.     417-418, , ѱ, 2000 1.

 

  ȣ, , " ϵ ũ ̺ б ä

    Ĩ ", 1999 ڰȸ ߰мȸ (û), pp.     683-688, , ѱ, 1999 11.

 

  , , ȣ, "Design of 250Mb/s 10-channel CMOS optical     receiver array for parallel optical interconnection," 5ȸ IDEC MPW

    ǥȸ , pp. 129-133, , ѱ, 1999 10.

 

  , , , , ȣ, "100MHz Ƴα FIR ",

    4ȸ IDEC MPW ǥȸ , pp. 206-211, , ѱ, 1999 1.

 

  , , , , ȣ, "100MHz Ƴα FIR ",

    1998 ASIC Design Workshop , pp. 253-254, õ, ѱ, 1998

    11.

 

  , , ȣ, "ǻ CMOS ű ", 3ȸ

    IDEC MPW ǥȸ , pp. 178-181, , ѱ, 1998 5.

 

  ȣ, , , "4-Mbps ܼ ű Ĩ", 5ȸ

    ѱ ݵü мȸ , pp. 369-370, , ѱ, 1998 2.

 

  , , ȣ, " ܼ ſ data transceiver Ĩ ",

     2 ȸ IDEC MPW ǥȸ , pp. 187-191, , ѱ, 1998 1.

 

  ȣ, " п -ð Ƴα ", 1ȸ IDEC MPC

    ǥȸ , pp. 129-134, , ѱ, 1997 2.

 

  ȣ, "Design of high-performance 32-channel GaAs optical receiver     array," 1996 ASIC Design Workshop , pp. 269-278, Ⱥ,  

    ѱ, 1996 7.

 

  ȣ, "High-performance 32-channel optical receiver array," 3ȸ  

    ڰ мȸ (û), pp. 7-11, , ѱ, 1996 5.

 

 

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